Event Link

Click here

Event Description

Centre for Development of Advanced Computing invites application from eligible candidates for Walk-in-Interview for the following posts:

Post Name: Project Engineer

Essential Qualification:

  • First class (60% or equivalent CGPA) B.E/ B. Tech. in Electronics/ Electronics and Communication Engineering OR

  • First class (60% or equivalent CGPA) Post Graduate degree in Electronics OR

  • M Tech in Electronics/VLSI & Embedded Systems Design


Desirable: ASIC Physical Design: Synthesis, Floor planning, Power planning, Placement, Clock Tree Synthesis, Routing, Static Timing Analysis & Physical Verification. ASIC Design in 40nm/ advanced process nodes. Expertise in Cadence / Synopsys lC design flows & scripting using TCL, Perl, etc. Processor Design: RISC-V or other processor lSAs, micro-architecture and digital logic design, computer architecture, hardware description languages viz. Verilog or Bluespec SystemVerilog or VHDL, FPGA design, programming skills in C, C++, or Python.

Place of Interview: CDAC, Vellayambalam, Thiruvananthapuram

For more details related to eligibility criteria, fee, pattern, annexures, place of posting etc. refer to the attachments below.

8 months later

Event Link

Click here

Event Description

Centre for Development of Advanced Computing invites application from eligible candidates for Walk-in-Interview for the following posts:

Post Name: Project Engineer

Essential Qualification:

  • First class (60% or equivalent CGPA) B.E/ B. Tech. in Electronics/ Electronics and Communication Engineering OR

  • First class (60% or equivalent CGPA) Post Graduate degree in Electronics OR

  • M Tech in Electronics/VLSI & Embedded Systems Design


Desirable: ASIC Physical Design: Synthesis, Floor planning, Power planning, Placement, Clock Tree Synthesis, Routing, Static Timing Analysis & Physical Verification. ASIC Design in 40nm/ advanced process nodes. Expertise in Cadence / Synopsys lC design flows & scripting using TCL, Perl, etc. Processor Design: RISC-V or other processor lSAs, micro-architecture and digital logic design, computer architecture, hardware description languages viz. Verilog or Bluespec SystemVerilog or VHDL, FPGA design, programming skills in C, C++, or Python.

Place of Interview: CDAC, Vellayambalam, Thiruvananthapuram

For more details related to eligibility criteria, fee, pattern, annexures, place of posting etc. refer to the attachments below.